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f8e1d110dc
vall-e
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vall_e
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models
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mrq
f8e1d110dc
when you uhh when you for once use your main rig to test and forgot to and when you port things back over
2025-04-18 20:49:00 -05:00
..
arch
diagnosed both hf/llama.cpp versions to probably just being a faulty export method (to-do: migrate vall_e.models.base to vall_e.export --hf)
2025-04-05 22:05:39 -05:00
__init__.py
nothing could go wrong part 2 (reverted and rewrote commits since there was a nasty regression)
2025-03-25 23:06:16 -05:00
ar_nar_v2.py
new implementation tweaks and fixes to make it actually better (there were a lot of badwrong things being done that harmed the output quality, will evaluate the model further)
2025-04-18 20:36:44 -05:00
ar_nar.py
when you uhh when you for once use your main rig to test and forgot to and when you port things back over
2025-04-18 20:49:00 -05:00
base_v2.py
added some more notes, tweaks (RIP DAC, it's over)
2025-04-17 20:24:40 -05:00
base.py
diagnosed both hf/llama.cpp versions to probably just being a faulty export method (to-do: migrate vall_e.models.base to vall_e.export --hf)
2025-04-05 22:05:39 -05:00
lora.py
naive model offloading support (handles automatically splitting parts of the model to requested device per memory constraints, either inferred or requested in the yaml, input tensors are automatically migrated to the right device, it SEEMS to work for training under the test trainer when split between GPU and CPU) (this was specifically only because that Flux imagegen model released so I can test it there)
2024-08-01 20:12:06 -05:00