DL-Art-School/codes
James Betker 59aba1daa7 LR switched SPSR arch
This variant doesn't do conv processing at HR, which should save
a ton of memory in inference. Lets see how it works.
2020-08-10 13:03:36 -06:00
..
.idea IDEA update 2020-05-19 09:35:26 -06:00
data Enable disjoint feature networks 2020-07-31 16:29:47 -06:00
data_scripts Don't recompute generator outputs for D in standard operation 2020-08-04 11:28:52 -06:00
metrics mmsr 2019-08-23 21:42:47 +08:00
models LR switched SPSR arch 2020-08-10 13:03:36 -06:00
options Integrate SPSR into SRGAN_model 2020-08-02 12:55:08 -06:00
scripts mmsr 2019-08-23 21:42:47 +08:00
temp Misc changes 2020-05-14 20:45:38 -06:00
utils Add FDPL Loss 2020-07-30 20:47:57 -06:00
process_video.py Debug process_video 2020-05-29 20:44:50 -06:00
recover_tensorboard_log.py Misc 2020-07-06 20:44:07 -06:00
requirements.txt Update requirements 2020-08-03 16:57:56 -06:00
run_scripts.sh mmsr 2019-08-23 21:42:47 +08:00
test.py Fix mega_batch_factor not set for test 2020-07-24 12:26:44 -06:00
train.py Crossgan 2020-08-07 21:03:39 -06:00