From 4bcc409fc7ad1653d3b90eabdd5bbf455dee3b84 Mon Sep 17 00:00:00 2001 From: James Betker Date: Tue, 14 Jul 2020 10:20:53 -0600 Subject: [PATCH] Fix loadSRG2 typo --- codes/models/archs/SwitchedResidualGenerator_arch.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/codes/models/archs/SwitchedResidualGenerator_arch.py b/codes/models/archs/SwitchedResidualGenerator_arch.py index 926380d0..8c0bb87b 100644 --- a/codes/models/archs/SwitchedResidualGenerator_arch.py +++ b/codes/models/archs/SwitchedResidualGenerator_arch.py @@ -241,7 +241,7 @@ class ConfigurableSwitchedResidualGenerator2(nn.Module): state_dict['switches.%i.switch.attention_norm.accumulator' % (i,)] = t_state['switches.%i.switch.attention_norm.accumulator' % (i,)] state_dict['switches.%i.switch.attention_norm.accumulator_index' % (i,)] = t_state['switches.%i.switch.attention_norm.accumulator_index' % (i,)] state_dict['switches.%i.switch.attention_norm.accumulator_filled' % (i,)] = t_state['switches.%i.switch.attention_norm.accumulator_filled' % (i,)] - super(DualOutputSRG, self).load_state_dict(state_dict, strict) + super(ConfigurableSwitchedResidualGenerator2, self).load_state_dict(state_dict, strict) class Interpolate(nn.Module):