DL-Art-School/codes/models/archs
2020-09-24 17:51:52 -06:00
..
__init__.py mmsr 2019-08-23 21:42:47 +08:00
arch_util.py SSG network 2020-09-15 20:59:24 -06:00
AttentionResnet.py Add attention resnet 2020-05-29 20:02:10 -06:00
discriminator_vgg_arch.py Add new referencing discriminator 2020-09-10 21:35:29 -06:00
DiscriminatorResnet_arch_passthrough.py Allow passthrough discriminator to have passthrough disabled from config 2020-05-19 09:41:16 -06:00
DiscriminatorResnet_arch.py Fixup upconv for the next attempt! 2020-05-01 19:56:14 -06:00
feature_arch.py Several things 2020-09-23 11:56:36 -06:00
FlatProcessorNet_arch.py Add more batch norms to FlatProcessorNet_arch 2020-04-30 11:47:21 -06:00
FlatProcessorNetNew_arch.py Full resnet corrupt, no BN 2020-04-30 19:17:30 -06:00
HighToLowResNet.py Misc changes 2020-04-28 11:50:16 -06:00
NestedSwitchGenerator.py Move MultiConvBlock to arch_util 2020-09-08 08:17:27 -06:00
ProgressiveSrg_arch.py Move MultiConvBlock to arch_util 2020-09-08 08:17:27 -06:00
ResGen_arch.py More NSG improvements (v3) 2020-06-29 20:26:51 -06:00
RRDBNet_arch.py Get rid of get_debug_values from RRDB, rectify outputs 2020-09-19 21:46:36 -06:00
spinenet_arch.py Spinenet: implementation without 4x downsampling right off the bat 2020-09-21 12:36:30 -06:00
SPSR_arch.py More fixes 2020-09-24 17:51:52 -06:00
SPSR_util.py Add simplified SPSR architecture 2020-08-03 10:25:37 -06:00
SRResNet_arch.py mmsr 2019-08-23 21:42:47 +08:00
StructuredSwitchedGenerator.py Add 'before' and 'after' defs to injections, steps and optimizers 2020-09-22 17:03:22 -06:00
SwitchedResidualGenerator_arch.py SiLU doesnt support inplace 2020-09-23 21:09:13 -06:00