Commit Graph

76 Commits

Author SHA1 Message Date
Tim Dettmers
7140c01405 Merge branch 'main' into fp8_merge 2023-04-12 11:44:39 -07:00
Tim Dettmers
ec1ea63711 Refactored triton into its own folder. Refactored fp8 matmuls. 2023-04-12 09:39:39 -07:00
Tim Dettmers
ed6f3eb146
Merge pull request #159 from TimDettmers/serialize_8bit
Implement proper serialization of Linear8bitLt
2023-04-11 07:24:51 -07:00
justheuristic
5e456be50e
Support 1650, 1660 2023-04-10 21:26:52 +03:00
Mitchell Wortsman
51f8bb7133 pre-triton update 2023-03-24 05:44:42 +00:00
Max Ryabinin
d15822a54b Refactor _tile_indices into a cached property, fix device bug 2023-02-25 06:23:07 +01:00
Tim Dettmers
5d2e23e8d6 Merge branch 'fp8sim' of github.com:TimDettmers/bitsandbytes into fp8sim 2023-02-23 10:56:49 -08:00
Tim Dettmers
c5c38ca19c Added matmul_mixed. 2023-02-23 10:45:18 -08:00
Mitchell Wortsman
3fbf60ad83 sim now worse than real 2023-02-23 08:27:15 +00:00
Mitchell Wortsman
7b764d3569 adding half() cast 2023-02-21 03:53:44 +00:00
Tim Dettmers
2489d819c5 Added more blocksizes for stochastic rounding; fixed dequant blocksize. 2023-02-14 13:55:17 -08:00
Tim Dettmers
ca3236587a Added forward/backward tests; removed bias. 2023-02-13 17:20:52 -08:00
Tim Dettmers
6bdb6c351e Added fp8 simulation layer. 2023-02-13 16:53:07 -08:00
Tim Dettmers
de53588934 Added Int8 matmul support for all GPUs. Full backward support. 2023-02-01 20:09:31 -08:00
Tom Aarsen
697bd02c60 Resolve dangerous default value [] as argument 2022-10-27 13:25:51 +02:00
Tom Aarsen
7a3c9af05d Sort imports
Via isort
2022-10-27 13:15:21 +02:00
Tom Aarsen
0b078403ee Simplify statements into equivalent, modern variants
via pyupgrade --py37-plus. The changes e.g. are subclassing from object, calling super() with super(ThisClass, self), or old-style syntax formatting.
2022-10-27 13:14:13 +02:00
Tom Aarsen
1eec77d34c Remove trailing whitespace & ensure newline at EOF 2022-10-27 13:11:29 +02:00
Tim Dettmers
9b7d307b8c review 2022-09-20 06:36:32 +03:00
justheuristic
5d65817101 debug 2022-09-18 01:09:24 +03:00
justheuristic
4da2227fcb debug 2022-09-18 01:03:21 +03:00
justheuristic
4b4a9effd1 debugprint 2022-09-18 01:02:13 +03:00
justheuristic
7906dc4c9a debugpritn 2022-09-18 00:57:26 +03:00
justheuristic
591f60395a add memory efficient backward 2022-09-18 00:52:53 +03:00
justheuristic
579b8c782f reduce diff 2022-09-18 00:47:58 +03:00
justheuristic
76ece2c126 rollback 2022-09-18 00:43:56 +03:00
justheuristic
18f142e268 addmm_ 2022-09-18 00:43:02 +03:00
justheuristic
ab9dee062d cast edge case 2022-09-18 00:36:46 +03:00
justheuristic
cbfdf0b5ef cast edge case 2022-09-18 00:35:42 +03:00
justheuristic
e35e2c665a cast properly 2022-09-18 00:35:03 +03:00
justheuristic
577275bd8c cast properly 2022-09-18 00:30:57 +03:00
justheuristic
45dc1983e9 cast properly 2022-09-18 00:28:03 +03:00
justheuristic
702cc72018 debug asset 2022-09-18 00:26:46 +03:00
justheuristic
a214824f93 matmul -1- addmm 2022-09-18 00:24:59 +03:00
justheuristic
14048a3c16 safer cast 2022-09-18 00:24:20 +03:00
justheuristic
5b169f18e4 change typecast behavior 2022-09-18 00:21:15 +03:00
justheuristic
1da4880262 change typecast behavior 2022-09-18 00:19:22 +03:00
justheuristic
1145589f84 change typecast behavior 2022-09-18 00:15:57 +03:00
justheuristic
d6e25b5f5e change typecast behavior 2022-09-18 00:15:18 +03:00
justheuristic
e2b523d071 change typecast behavior 2022-09-18 00:07:05 +03:00
justheuristic
85bf5294a6 debug assert 2022-09-18 00:01:25 +03:00
justheuristic
210b9ed9ce debug assert 2022-09-18 00:00:45 +03:00
justheuristic
647c976a74 change order 2022-09-17 23:59:36 +03:00
justheuristic
0de1a4494b change order 2022-09-17 23:53:49 +03:00
justheuristic
e9b87112ee un-fuse bias 2022-09-17 23:51:28 +03:00
justheuristic
56a074f6dc un-fuse bias 2022-09-17 23:46:37 +03:00
justheuristic
d9ca0ed905 un-fuse bias 2022-09-17 23:44:28 +03:00
justheuristic
eac9aca460 cast bias too 2022-09-17 23:38:09 +03:00
justheuristic
a9fe0ff98c recast to fp16 2022-09-17 23:34:22 +03:00
justheuristic
fc4a135ed1 clearer assertions 2022-09-17 23:24:26 +03:00