DL-Art-School/codes/models/archs
James Betker 10f7e49214 Add ConvBnSilu to replace ConvBnRelu
Relu produced good performance gains over LeakyRelu, but
GAN performance degraded significantly. Try SiLU as an alternative
to see if it's the leaky-ness we are looking for or the smooth activation
curvature.
2020-07-05 13:39:08 -06:00
..
__init__.py mmsr 2019-08-23 21:42:47 +08:00
arch_util.py Add ConvBnSilu to replace ConvBnRelu 2020-07-05 13:39:08 -06:00
AttentionResnet.py Add attention resnet 2020-05-29 20:02:10 -06:00
discriminator_vgg_arch.py Add capability to place additional conv into discriminator 2020-06-23 09:40:33 -06:00
DiscriminatorResnet_arch_passthrough.py Allow passthrough discriminator to have passthrough disabled from config 2020-05-19 09:41:16 -06:00
DiscriminatorResnet_arch.py Fixup upconv for the next attempt! 2020-05-01 19:56:14 -06:00
feature_arch.py Fix process_video bugs 2020-05-29 12:47:22 -06:00
FlatProcessorNet_arch.py Add more batch norms to FlatProcessorNet_arch 2020-04-30 11:47:21 -06:00
FlatProcessorNetNew_arch.py Full resnet corrupt, no BN 2020-04-30 19:17:30 -06:00
HighToLowResNet.py Misc changes 2020-04-28 11:50:16 -06:00
NestedSwitchGenerator.py NSG r7 2020-07-01 09:54:29 -06:00
ResGen_arch.py More NSG improvements (v3) 2020-06-29 20:26:51 -06:00
RRDBNet_arch.py Remove RRDB with switching 2020-07-01 12:08:32 -06:00
spinenet_arch.py Add SpineNet & integrate with SRG 2020-07-03 12:07:31 -06:00
SRG1_arch_new.py Remove all biases from generator 2020-07-04 22:19:55 -06:00
SRG1_arch.py Add ConvBnSilu to replace ConvBnRelu 2020-07-05 13:39:08 -06:00
SRResNet_arch.py mmsr 2019-08-23 21:42:47 +08:00
SwitchedResidualGenerator_arch.py Remove RDB from srg2 2020-07-03 22:31:20 -06:00